最后产生mbist pattern
set_context patterns -ijtag
set_tsdb_output_directory tsdb_outdir/mbist_tsdb
open_tsdb xxx/xx/design/tsdb_outdir
设置scan chain之后的netlist tsdb_outdir
read_icl xxx/xxx/design_gate.icl
读取scan chain之后保存的icl
set_current_design $design_name
link design
set_ijtag_retargeting_options -tck_period 24ns -tck_ratio 1
设置ijtag retargeting ratio （设置产生pattern的jtag clock 频率。通常jtag clock频率和test clock 频率一致）
set_default_value PatternsSpecification/SignOffOptions/simulate_instruments_in_lower_physical_instance on
(pattern 的一个setting 默认只有当前physical instance 层级的 instruments Bist controller被仿真， 当做了on后，底层的physical instance 的bist controller & instruments 也会被仿真一遍）
source /xxx/xx/xx/tdr_ctrl.pdl
读取用户设置的pdl 设置pll等需要设置的setting
tdr_ctrl.pdl 内部信息
iProcsForModule design_name
iTopProc pll_cfg {} {
iWrite inst_xxx_pll_tdr.ijtag_data_out[xx] 0b0
iApply
>>> 设置tdr value控制pll
…
iNote “wait lock”
iRunLoop -time 20us
iApply
}
set pat_spec [create_pattern_specification -replace]
mbist 测试可分high_speed （就是func clock驱动） low_speed (就是test clock驱动） full_addr (mem 全地址） reduce_addr (精简地址， 为了加速仿真使用的默认好像是精简地址） 最后signoff时候使用 full_addr
可以删除一些不要做的pattern测试
比如
if {$mode == “full_addr” || $mode == “low_speed”} {
delete_config_element [get_config_elements $pat_spec/Patterns(ICL)]
delete_config_element [get_config_elements $pat_spec/Patterns(Bscan)]
delete_config_element [get_config_elements $pat_spec/Patterns(ParallelRetentionTest)]
} else {
delete_config_element [get_config_elements $pat_spec/Patterns(ParallelRetentionTest)]
}
ICL pattern是 jtag 1687 network pattern , Bscan pattern 是 boundry scan pattern , ParallellRetentionTest 是测试mem retention . 这些在high speed mode下 run 在low_speed 和full_addr 下去掉。 因为在任何mode下 jtag和 Bscan network 是一样的。
if {$mode = ‘high_speed’} {
set bscan_pattern [get_name_list [get_config_elements $pat_spec/Patterns(JtagBscan*)]]
foreach p $bscan_pattern {
delete_config_element $p/TestStep(JtagBscanTestStep)/BoundaryScan/RunTest(test_logic_reset)
delete_config_element $p/TestStep(JtagBscanTestStep)/BoundaryScan/RunTest(highz)
}
}
high_speed mode下不测试HIGHZ instruction code 和 reset properly
set mbist_pattern [get_name_list [get_config_elements $pat_spec/Patterns(MemoryBist*)]]
foreach mp $mbist_pattern {
read_config_data -before [get_config_elements $mp/TestStep] -from_string {
ProcedureStep(mbist_setup) {
iCall(pll_cfg) { >>> 前面source pdl里面定义的proc
}}}
read_config_data -before $mp/TestStep(run_time_prog) -from_string {
ClockPeriods {
PLL_REF_CLK : 24ns
} }
set_config_value $mp/timeplate gen_mbist_tp
}
if {$mode == “low_speed”} {
set_config_value [get_name_list [get_config_elements $pat_spec/Patterns(*)/tck_clock_only]] on
}
low_speed mode pattern下使用 tck clock 进行慢速mbist 测试
if {$mode == “full_addr”} {
set_config_value [get_name_list [get_config_elements $pat_spec/Patterns(*)/TestStep(run_time_prog)/MemoryBist/reduced_address_count]] off
}
full_addr 关闭reduced_address
下来该设置setup procedure. 就是scan 测试一开始时候就要进行的操作，这个操作先于所有pattern
set_confit_value $pat_spec/AdvancedOptions/procfile_name xxx/xxx/scan.setup.proc
AdvancedOptions/procfile_name 后面的proc 里面设置 test_setup proc & test_end proc
scan.setup.proc 里面大概就这样
set time scale 1 ps;
set strobe_window time 10000000;
//以test clock 周期24M为例
timeplate mbist_tp =
force_pi 0 ;
measure_po 10400； // 1/4 周期
pulse_clock 20800 31200; // 1/4 占空比
period 41600; 步进长度一个周期
end;
procedure setup_proc =
timeplate tp;
cycle =
force DFT_MODE 0;
force RESET 0;
pulse TEST_CLOCK_AUL_PORT;
end;
cycle =
end;
cycle =
end; // 走两个步进长度
cycle =
force DFT_MODE 1;
pulse TEST_CLOCK_AUL_PORT;
end;
cycle =
forece RESET 1;
pulse TEST_CLOCK_AUL_PORT;
end;
cycle =
pulse TEST_CLOCK_AUL_PORT;
end;
end;
// 复位dft reset 完成setup 操作 期间需要test_clock 参与
默认吐的pattern是signoff模式就是吐的 vector （verilog)
如果是要WGL 形式的pattern 测试机台吃的
要
set_config_value PatternsSpecification(design_name,id,stage)/usage manufacturing_test
set_config_value PatternsSpecification(design_name,id,stage)/manufacturing_patterns_formats WGL
report_config_data $pat_spec > pat_spec.post.rpt
process_pattern_specification
报告pattern spec 然后产生pattern